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Message
From: Richard Herveille<richard@h...>
Date: Thu Oct 26 10:12:30 CEST 2006
Subject: [oc] which the RTL code of I2C core is corrected
Richard Herveille wrote:
> Anyways it's always a good idea to thoroughly check whatever IP you
receive.
Can't I just put your email and phone number in the code??? ;)
[rih] :D, sure at $100 per hour for support :p
Speaking of testing, I've run into a problem simulating the VHDL core in
my testbench and am wondering why the supplied testbench doesn't have
the same problem (I haven't run it myself as yet)!?!
[rih] This is a general problem with VHDL (actually with std_logic).
You could try to change the line from
if (sSCL = '1' and dSCL = '0') then
to
if ((sSCL = '1' or sSCL = 'H') and dSCL = '0') then
Or use a conversion script like the one you described.
The code is clean, this is a simulation problem.
Richard
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