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    Navigation: All forums > Cores > Message List > Message Post

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    From: Joachim Strömbergson<Joachim.Strombergson@I...>
    Date: Fri Oct 20 10:05:00 CEST 2006
    Subject: [oc] C-To-FPGA
    Top
    Aloha!

    > do not forget that exist Handel-C and SystemC (this one works ) or seems,
    > and have "small" players behind as Cadence, synopsis and mentor for
    > example.
    > my $ 0,02 contribution
    >
    > P.S.: my opinion, this kind of thing do not work, i have experienced both
    > languages that i cited and ALAWAYS write HDL from scratch seems the better
    > way.

    (1) SystemC is mainly target at system modelling, not system
    implementation. There are attempts at using it for HW-implementation, some
    even mildly successful. But using a tool for something its not built for
    will always be less than optimal. Yes, a wrench can be used as a hammer,
    and an aircraft carrier can be used for deep sea exploation, but the tool
    might work against you and the result might be less than perfect.

    (2) We've come a long way baby. SW->HW-translation (as in C->FPGA,
    SPW->ASIC etc) has been the "next big thing" for decades. Now however we
    seem to really getting there. I attribute this to two things:

    1: The tool vendors aim for practical applications - not academic
    achievments. When I did my thesis on high level synthesis for
    reconfigurable computing ten years ago it was all about resource sharing
    optimization and very complex algorithms for optimal scheduling. Today
    it's ok not to come within 30% of hand-designed HW. If you can meet the
    application size and performance target then you are done - even if it
    means the HW is very much not optimal. As long as you got there faster
    than hand implementation. Time to market is _much_ more important.

    2: Moores law provides us with enough cheap gates, registers and wires to
    allow us to be sloppy with the results. Good enough is... good.


    For a practical and *working* example look at alteras new C2H (C to
    Hardware) tool. It ignores (pretty much) all complexities with resource
    sharing and loads of other things that makes C->HW translation hard. The
    result is bygger and slower HW than you would make yourself. But it works,
    takes little time to perform and can be done by SW-guys with basically one
    day of training.

    And as a side benefit Altera gets to sell more (big) FPGAs.

    I have heard good stuff about Mentors Catapult-C tool, albeit the need for
    constraints files as long or longer than the C-code itself sort of sound
    like the tool is really trying to do lots of cool optimizations.

    And since you mentioned Handel-C, there have been some serious
    developments there too. It's not your grandfathers university Handel-C.

    I will always have a heart for HW-implementation, but I'm pretty convinced
    that HW-implementation jobs will be marginalized in the coming years. Not
    only beacuse it's getting very easy to outsource (see all "help me build
    xyz" mail from India and Chine on this list), but more importantly due to
    the coming of age of tools like H2C, Catapult-C, Handel-C, Mitrons C
    compiler for FPGA acceleration etc. HW-implementation will become a tool
    phase. We as engineers will have to move up the food chain. Be the ones
    that specify _what_ to implement in HW and write the specifications.

    And thats was my 1 SEK of knowledge (we didn't get the Euro ;-)

    --
    Med vänlig hälsning, Yours

    Joachim Strömbergson - VP R&D InformAsic
    -----------------------------------------------

    ReferenceAuthor
    [oc] C-To-FPGALuís Cargnini

     
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