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Message
From: ferrarino82 at yahoo.it<ferrarino82@y...>
Date: Wed Mar 15 21:20:58 CET 2006
Subject: [oc] i2c core using a state machine (no microcontroller interface)
I managed to use your i2c_core on niosII by avalon bus.Now I want to use it stand alone (on a FPGA without microcontroller interface) without avalon bus, but I'm not able to understand how to give to the i2c_master_top inputs the right signals using a state machine. I know only VHDL and not Verilog. Any help about this topic? (for example a vhdl testbench to simulate it on modelsim). I need only read data from a slave, I don't need to write data to a slave. (I have to acquire sensors using i2c bus)
Regards, Giuseppe University of Catania
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