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Message
From: ferrarino<ferrarino82@y...>
Date: Thu Feb 23 13:57:59 CET 2006
Subject: [oc] I2C ip core integration for ALTERA FPGAs
Hello,
I have created the avalon bus as Guido told in this post.
I tried to compile the project but there is an error: a mismatching between
the wb_adr_i of the sopc (std_logic_vector) and the I2C_master_top
(unsigned). So I need this wrapper.......how do I create it?
Please tell me any suggestions!!!!
After created the avalon bus, have I to use the oc_i2c_master.h function to
write and read the I2C?
thanks,
Giuseppe
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View this message in context: http://www.nabble.com/Re%3A-I2C-ip-core-integration-for-ALTERA-FPGAs-t995020.html#a3088698
Sent from the OpenCores - IP Cores forum at Nabble.com.
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