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    Navigation: All forums > Cores > Message List > Message Post

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    From: jihoon at margi.com<jihoon@m...>
    Date: Tue Dec 13 20:11:02 CET 2005
    Subject: [oc] DDR SDRAM controller
    Top
    I did the same thing you are trying to do.
    But I think it's too late.
    If you have any question, send me an email.

    /Jihoon

    ----- Original Message -----
    From: Anna D. Ashley<ada@c...>
    To:
    Date: Mon Aug 29 17:19:33 CEST 2005
    Subject: [oc] DDR SDRAM controller

    > Hi all,
    >
    > meanwhile I had some questions from some of you about my problem
    > and
    > solutions. Unfortunately I have not solved this problem and it
    > seems to
    > be no solution. MIG007 works with a couple of test boards supported
    > by
    > Xilinx and does not work with the rest (or I could not find out how
    > to
    > bring it to work). So I switched to the open cores DDR SDRAM
    > controller
    > design but it is going not so fast because there is no any
    > help\documentation\support.
    > If someone would solve the problem just let me know.
    > Also if someone has already used open cores controller please tell
    > me.
    > Best,
    > Anna
    > xjf77 at opencores.org wrote:
    > >Hi, Anna,
    > > I am also working on DDR SDRAM Controller. Would you please
    > tell me
    > >if you have solved this problem? If yes, which tool did you
    > use? MIG007
    > >or open core from here?
    > > Cheers,
    > >xjf77
    > >
    > >----- Original Message -----
    > >From: ada at cwazy.co.uk<ada at c...>
    > >To:
    > >Date: Wed Aug 10 12:06:43 CEST 2005
    > >Subject: [oc] DDR SDRAM controller
    > >
    > >
    > >
    >
    >

    Follow upAuthor
    [oc] DDR SDRAM controllerMike Delaney

     
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