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Message
From: Mr mike johnson<mikej@f...>
Date: Thu Dec 8 10:11:07 CET 2005
Subject: [oc]
Re: T80 bugfix for INI, IND, INIR, INDR, OUTI, OUTD, OTIR, OTDR
let me know as well if you could. I remember going round this, and I think
the www.fpgaarcade.com version is correct.
diff the microcode.
if so, I should really merge it back to OCs
/Mike
Guy Hutchison writes:
> Hi Peter,
>
> We spoke a while back, and you mentioned the JR bug recently on the
> list. I had a little time today to look in to it, and was wondering
> if you could elaborate on what the bug is.
>
> According to the Z80 handbook, the cycle timing for a JR operation is
> 4/3 if the test fails, and 4/3/5 if the test passes. This matches the
> mcycle coding in the microcode as well as the results I see in
> simulation.
>
> Could you (re)summarize the problem for me?
>
> Thanks,
>
> Guy
> _______________________________________________
> http://www.opencores.org/mailman/listinfo/cores
>
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