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    Navigation: All forums > Cores > Message List > Message Post

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    From: Michael Geng<vhdl@M...>
    Date: Wed Oct 12 21:59:46 CEST 2005
    Subject: [oc] Extensions to single_port asynchronous memory model
    Top
    Hi Robert, Damjan, Matjaz,

    I could successfully add the announced changes. I also added the suggested opencores header and
    a copy of the LGPL license.

    Thank you all for your help!
    Michael

    On Tue, Oct 11, 2005 at 11:19:26PM +0200, rpaley_yid@y... wrote:
    > Michael,
    >
    > Please add a GPL copywrite statement in each file and reference the
    > GPL. Also, to avoid problems with links going away, please add a copy of
    > the GPL to this project. The location is....
    >
    > http://www.gnu.org/copyleft/gpl.txt to the project.
    >
    > regards,
    > r
    >
    > ----- Original Message -----
    > From: Michael Geng<vhdl@M...>
    > To:
    > Date: Tue Oct 11 22:09:32 CEST 2005
    > Subject: [oc] Extensions to single_port asynchronous memory model
    >
    > > On Tue, Oct 11, 2005 at 09:18:43PM +0200, Damjan Lampret wrote:
    > > Robert,
    > > my username at opencores.org is mgeng.
    > > Regards,
    > > Michael
    > > > You need to be added by the relevant project's maintaner. Only
    > > project
    > > > maintainers can add new maintainers to their project. This can
    > > be done by
    > > > going to Admin link - you have to be logged in with your
    > > username and
    > > > password to see Admin.
    > > >
    > > > regards
    > > > Damjan
    > > >
    > > > ----- Original Message -----
    > > > From: "Michael Geng" <vhdl at MichaelGeng.de>
    > > > To: "Discussion list about free open source IP
    > > cores" <cores at opencores.org>
    > > > Cc: "Robert Paley" <rpaley_yid at yahoo.com>
    > > > Sent: Tuesday, October 11, 2005 9:02 PM
    > > > Subject: Re: [oc] Extensions to single_port asynchronous
    > > memory model
    > > >
    > > >
    > > > >On Mon, Oct 10, 2005 at 08:24:07PM +0200, rpaley_yid at
    > > yahoo.com wrote:
    > > > >>I like your additions and have asked the site admin
    > > people to add you as
    > > > >>a maintainer. i'm pleased to know that by using the
    > > linked-list
    > > > >>architecture, you were able to cut memory usage by 4x.
    > > Did you notice
    > > > >>any change in simulation speed?
    > > > >
    > > > >Thank you for your confidence! I will check in the changes
    > > as soon as I
    > > > >have the appropriate
    > > > >rights.
    > > > >
    > > > >Before I used your linked list model the simulator
    > > required more memory
    > > > >than I have in my PC so
    > > > >that it started swapping. Because of this in my special
    > > case the
    > > > >simulation speed increased even
    > > > >with the linked list architecture as it doesn't swap any
    > > more. I haven't
    > > > >done any exact
    > > > >measurements neither on memory usage nor on speed, also
    > > the 4x increase is
    > > > >a very rough estimation.
    > > > >I'm just happy that I found a solution to simulate my
    > > whole system
    > > > >including external memory.
    > > > >
    > > > >There's an initial version checked in (1.1) and there's a
    > > branch
    > > > >(1.1.1.1). I can't see any
    > > > >differences. Are there any? What were the reasons for
    > > branching?
    > > > >
    > > > >I can't find any license statements with this core. I
    > > would like to see it
    > > > >under the GPL. How do
    > > > >you think about it?
    > > > >
    > > > >Michael
    > > > >_______________________________________________
    > > > >http://www.opencores.org/mailman/listinfo/cores
    > > >
    > > >
    > >
    > >
    > _______________________________________________
    > http://www.opencores.org/mailman/listinfo/cores

    ReferenceAuthor
    [oc] Extensions to single_port asynchronous memory modelRpaley_yid

     
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