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Message
From: Michael Geng<vhdl@M...>
Date: Tue Oct 11 21:02:33 CEST 2005
Subject: [oc] Extensions to single_port asynchronous memory model
On Mon, Oct 10, 2005 at 08:24:07PM +0200, rpaley_yid@y... wrote:
> I like your additions and have asked the site admin people to add you as
> a maintainer. i'm pleased to know that by using the linked-list
> architecture, you were able to cut memory usage by 4x. Did you notice
> any change in simulation speed?
Thank you for your confidence! I will check in the changes as soon as I have the appropriate
rights.
Before I used your linked list model the simulator required more memory than I have in my PC so
that it started swapping. Because of this in my special case the simulation speed increased even
with the linked list architecture as it doesn't swap any more. I haven't done any exact
measurements neither on memory usage nor on speed, also the 4x increase is a very rough estimation.
I'm just happy that I found a solution to simulate my whole system including external memory.
There's an initial version checked in (1.1) and there's a branch (1.1.1.1). I can't see any
differences. Are there any? What were the reasons for branching?
I can't find any license statements with this core. I would like to see it under the GPL. How do
you think about it?
Michael
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