LOGIN   :::   RECOVER PASS   :::   GET ACCOUNT    
Browse
  • Projects
  • Code (CVS)
  • Forums
  • News
  • Articles
  • Polls
  •  
    OpenCores
  • FAQ
  • CVS HowTo
  • Mission
  • Media
  • Tools
  • Advertise
  • Mirrors
  • Logos
  • Contact us
  • Job Opportunity
  •  
    Tools
  • Search
      
  • Download Cores (CVSGet)
  •  
    More
  • Wishbone
  • Perlilog
  • EDA tools
  • OpenTech CD
  •  
    Navigation: All forums > Cores > Message List > Message Post

    Message

    Reply | Reply all
    Date Prev | Date Next | Thread Prev | Thread Next Date Index | Thread Index

    From: rpaley_yid at yahoo.com<rpaley_yid@y...>
    Date: Mon Oct 10 20:24:07 CEST 2005
    Subject: [oc] Extensions to single_port asynchronous memory model
    Top
    Hi Michael,

    I like your additions and have asked the site admin people to add you as
    a maintainer. i'm pleased to know that by using the linked-list
    architecture, you were able to cut memory usage by 4x. Did you notice
    any change in simulation speed?

    regards,

    r

    Follow upAuthor
    [oc] Extensions to single_port asynchronous memory modelMichael Geng

     
    Copyright (c) 1999 OPENCORES.ORG. All rights reserved.