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Message
From: jtrabal at engin.umass.edu<jtrabal@e...>
Date: Tue Aug 16 17:00:01 CEST 2005
Subject: [oc] GPIO Core
Hi,Sorry for bother. I am trying to implement the PCI core on a
Spartan II 2s200 PCI Board from Memec. Also, I am trying to implement
the Simple General PurposeIO core, which is very simple and compatible
with Wishbone andcan be downloaded from here:
http://www.opencores.com/cvsweb.shtml/simple_gpio/rtl/
I only need output pins. In the header of the simple_gpio.v file says the
following (I copy here from there):
// Registers:
//
// 0x00: Control Register <io[7:0]>
// bits 7:0 R/W Input/Output '1' = output mode
// '0' = input mode
// 0x01: Line Register
// bits 7:0 R Status Current GPIO pin level
// W Output GPIO pin output level
//
// Use a pin as an output:
// Program the corresponding bit in the control register to 'output mode'
('1').
// Program the GPIO pin's output level by writing to the corresponding
bit in the Line Register.
// Reading the GPIO pin's Line Register bit while in output mode returns
the current output level.
My questions are:
1) How can I program the corresponding bit in the control register
to 'output mode' ('1')?
2) How can I program the GPIO pin's output level by writing to the
corresponding bit in the Line Register?
Is that can be done only changing:
always @(posedge clk_i or negedge rst_i)
if (~rst_i)
begin
ctrl <= #1 {{io}{1'b0}};
line <= #1 {{io}{1'b0}};
end
else if (wb_wr)
if ( adr_i )
line <= #1 dat_i[io-1:0];
else
ctrl <= #1 dat_i[io-1:0];
to:
always @(posedge clk_i or negedge rst_i)
if (~rst_i)
begin
ctrl <= #1 {{io}{1'b1}};
line <= #1 {{io}{1'b1}};
end
else if (wb_wr)
if ( adr_i )
line <= #1 dat_i[io-1:0];
else
ctrl <= #1 dat_i[io-1:0];
Please, any help? Thanks in advance.
Regards,
Jorge
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