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From: Guy Hutchison<ghutchis@g...>
Date: Tue Jun 21 18:40:50 CEST 2005
Subject: [oc] hdl designer xilinx flow with verilog
Short version: Don't use ISE to compile your files

ISE requires all include files to be correct relative to where you
started it from. So you would need to change every include to:
`include "my/relative/path/include.vh"

Theoretically there's an +incdir type directive so you don't have to
do that, but it's simpler to just create a command-line script and use
XST from the command line.

xst -ifn compile.scr

compile.scr:
run -ifn compile.list -ofn my_design.ngc -top my_design_top
-keep_hierarchy Yes -ofmt NGC -uc my_constraints.xcf -p xc2VP7-FF672-6
-opt_mode Speed -opt_level 2

- Guy

Reference	Author
[oc] hdl designer xilinx flow with verilog	Foryst