LOGIN   :::   RECOVER PASS   :::   GET ACCOUNT    
Browse
  • Projects
  • Code (CVS)
  • Forums
  • News
  • Articles
  • Polls
  •  
    OpenCores
  • FAQ
  • CVS HowTo
  • Mission
  • Media
  • Tools
  • Advertise
  • Mirrors
  • Logos
  • Contact us
  • Job Opportunity
  •  
    Tools
  • Search
      
  • Download Cores (CVSGet)
  •  
    More
  • Wishbone
  • Perlilog
  • EDA tools
  • OpenTech CD
  •  
    Navigation: All forums > Cores > Message List > Message Post

    Message

    Reply | Reply all
    Date Prev | Date Next | Thread Prev | Thread Next Date Index | Thread Index

    From: Sheila Carey<sheilapcarey@d...>
    Date: Wed Jun 8 19:59:13 CEST 2005
    Subject: [oc] IC Design mentor/guide needed - SOC
    Top
    LeRoi, there are several in-depth verification tutorials shot at DVCon in
    May at:

    www.demosondemand.com/dod/feat_cont/seminars/dvcon.aspx

    These are free, as are the other 35 hours of conference sessions from DVCon.


    The Demos on Demand crew recorded the entire conference, which is
    exclusively focused on verification technology and issues.


    -----Original Message-----
    From: cores-bounces@o... [mailto:cores-bounces@o...] On
    Behalf Of leroicollier@e...
    Sent: Tuesday, June 07, 2005 8:39 PM
    To: cores@o...
    Subject: [oc] IC Design mentor/guide needed - SOC

    Hello everyone. I want to enhance my design/verification
    skills and I am looking for a mentor/guide to help me through
    this. If someone has a project in mind, preferably a meaningful
    SOC, which they are thinking about, I would be happy to assist
    you or if you know of a project that is just getting off the
    ground please let me know. I have looked over some of the
    projects contained here although not all and found that they
    were either dead (a few years since their last update) or too
    far along (well past specifications), but I will continue to
    search. I would like to be involved or guided through every
    aspect starting from specification. I am hard working, dedicated
    and independent. I also can supply the following resources:
    *5-10 hours per week (possibly more, but I can guarantee the min)
    *Access to simulation tools and a dedicated linux box
    *Verilog background (but very willing to work and learn in VHDL)
    *Ingenuity and determination in solving problems

    I am concerned with the experience and not the credit. If you
    can help, please send me an email at "leroicollier at earthlink dot
    net". Thanks in advance.

    LeRoi
    _______________________________________________
    http://www.opencores.org/mailman/listinfo/cores




    ReferenceAuthor
    [oc] IC Design mentor/guide needed - SOCLeroicollier

     
    Copyright (c) 1999 OPENCORES.ORG. All rights reserved.