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Message
From: "Jim Dempsey" <tapedisk@a...>
Date: Tue, 21 Oct 2003 11:24:09 -0500
Subject: Re: [oc] ARM 922T, Cyclone FPGA
Christian,
Multi-threading is generaly a function of the operating system. You can also
perform multi-threading within an application by way of a custom written
interrupt service routine or by use of co-routintnes. This is not hard to
do. With the selection of ARM922T in Excalibur you generaly will end up
using one processor. With the selection of NIOS in Excalibur or in Cyclone
you have the choice of either multi-threading a single processor (via OS or
application) or by using multiple processors (e.g. one per thread).
Depending on the size of the core you can get a bunch of NIOS processors
working on the problem. You can do a similar thing with and OpenCores
processor. However, if you elect to go the multiple processor route my
inexperienced guess would be that the Avalon bus would be a better choice
than the Wishbone bus.
Although ARM922T is faster than NIOS running a benchmark you have the
flexibility of using the FPGA to add hardware accellerators. You may find
the following article of interest.
http://www.cl.cam.ac.uk/~rnc1/descrack/cracker.shtml
You can thank John Dalton for pointing this out about two years ago
----- Original Message -----
From: "John Dalton" <john.dalton@b...>
To: <cores@o...>
Sent: Thursday, November 08, 2001 9:14 PM
Subject: [oc] Interesting Article
In the article they were using NIOS processor running at a paultry 33MHZ to
crack DES encryption keys. By attacking the problem with an innovative
hardware aproach they were able to reduce the time of the crack from and
estimated 34.6 years to 37 hours. This represents a performance boost of
over 8000 to 1. This illustrates that the choice of processor speed has very
little to do with application performance when you attack the problem with
innovative hardware accelleration.
>From looking at your mcdi.com web page I would venture to guess that your
intended application will be for an alarm management system. With the
selection of NIOS you could elect to use one NIOS processor per phone line.
As well as one processor per 2 lines, 4 lines, ... Using more lines per
processor will permit you to select a smaller device.
What I would suggest you do is build your next generation exprecium PCI bus
card with a ribbon cable connector that connects to an external phone jack
pannel. Then by way of what you elect to Flash into the configuration memory
you can have one card that you sell as multiple products. i.e. the end user
buys a configuration with as many number of lines as they want. The user can
field upgrade the unit in realtime without requiring them to shutdown the
alarm monitoring station.
Jim Dempsey
----- Original Message -----
From: <christian@m...>
To: <cores@o...>
Sent: Monday, October 20, 2003 11:34 AM
Subject: [oc] ARM 922T, Cyclone FPGA
> I would like to know if we can implement ARM922T into the Cyclone
> FPGA? We would like to buy the Cyclone developement Kit from Altera,
> but we have to know about ARM922T before to proceed to buy it. I
> know that the Nios CPU is available, but we're interested about multi-
> threading and supporting MMU.
>
> Regards
>
> Christian
>
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