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Message
From: =?UTF-8?B?Sm9hY2hpbSBTdHLDtm1iZXJnc29u?=<Joachim.Strombergson@I...>
Date: Fri, 19 Sep 2003 15:42:03 +0200
Subject: Re: [oc] FREE Verilog Simulator
Aloha!
Rudolf Usselmann wrote:
> I just stumbled across this baby:
>
> http://www.pragmatic-c.com/gpl-cver/
Pretty kewl. I compiled and built it without any problems. Kudos to the
Pragmatic-C team to produce a nice tarball with lots of READMEs explaining all
directories etc.
I've done som initial testruns on it works. What I'm curious/concerned about
is simulation speed, especially on non-trivial designs. Icarus Verilog is in
my opinion quite good in this respect. If time permits I'll try and do a
shootout between these two Open Source Verilog simulators.
--
Med vänlig hälsning, Yours
Joachim Strömbergson - Alltid i harmonisk svängning.
VP, Research & Development
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