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Message
From: Daniel Haensse <haensse@s...>
Date: Tue, 16 Sep 2003 07:05:20 +0200
Subject: Re: [oc] CRC32
> > does anybody have a CRC32 core with wishbone interface. I need one to
> > calculate NAND flash block checksum.
>
> Why don't you compute your CRC32 as part of your flash controller? If
> you have a per-bit clock available to you, computing any CRC is
> extremely easy; at additional hardware cost you can also do it with a
> slower clock:
>
> http://cell-relay.indiana.edu/mhonarc/cell-relay/1999-Aug/msg00081.shtml
>
> Sticking a wishbone interface on a CRC calculation seems like overkill
> in the extreme.
The NAND flash controller is running on the uP, the FPGA is connected as
"coprocessor" and does not interface the flash directly. The flash has a 8
bit interface, so I need a parallel implementation. I have to dig through the
linux kernel again, but I guess that there are multiple location which need a
CRC calculation. So it might be handy even not to "hardwire" the polynom and
make it programmable.It might also need something to flip bitorder, depending
on the way the CRC is transmitted over media.
thanks for the hint
regards
Dani
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