LOGIN   :::   RECOVER PASS   :::   GET ACCOUNT    
Browse
  • Projects
  • Code (CVS)
  • Forums
  • News
  • Articles
  • Polls
  •  
    OpenCores
  • FAQ
  • CVS HowTo
  • Mission
  • Media
  • Tools
  • Sponsors
  • Mirrors
  • Logos
  • Contact us
  •  
    Tools
  • Search
      
  • Download Cores (CVSGet)
  •  
    More
  • Wishbone
  • Perlilog
  • EDA tools
  • OpenTech CD
  •  
    Navigation: All forums > Cores > Message List > Message Post

    Message

    Reply | Reply all
    Date Prev | Date Next | Thread Prev | Thread Next Date Index | Thread Index

    From: Umair Farooq Siddiqi <ufarooq.geo@y...>
    Date: Thu, 19 Jun 2003 02:42:53 -0700 (PDT)
    Subject: [oc] interfacing 16Mhz and I Mhz clock registers
    Top

    Hi

    I am interfacing two 16-bit wide registers, one running at 16 Mhz to another register running at 1 Mhz. On 16 Mhz side though the clock is at 16 Mhz but data only changes after 16 clocks, hence I am thinking of directly connecting both clock frequency registers. Would you kindly suggest me whether my approach is correct or not? Is there any special care required to meet setup and hold timings ?

    Thank you

    Umair

     


    Do you Yahoo!?
    SBC Yahoo! DSL - Now only $29.95 per month!

    ReferenceAuthor
    Re: [oc] linux xilinx webpack programmingUwe Bonnes

    Follow upAuthor
    Re: [oc] interfacing 16Mhz and I Mhz clock registersH Peter Anvin
    Re: [oc] interfacing 16Mhz and I Mhz clock registersJohn Sheahan

     
    Copyright (c) 1999 OPENCORES.ORG. All rights reserved.