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    Navigation: All forums > Cores > Message List > Message Post

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    From: Héctor Orón Martínez <hecormar@t...>
    Date: Wed, 26 Mar 2003 21:05:46 +0100 (CET)
    Subject: [oc] FPGA BOARD Considerations
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    Hello,
    
      I have been designing a FPGA TRAINER schematic/board for OPENCORES.
      Here is one problem i have find, and is memory EPROM or EEPROM for my 
    devices, i'm using ACEX1K and APEX20KE. When i bought that they didn't send me 
    the memory, and i asked for price, they told me i could buy from them a EEPROM 
    memory with JTAG support by 20 dollars/euro (exchange is more or less alike), i 
    thought to myself it is expensive, and i ask in some places, and give me some 
    ideas... i could be using a DSP with memory and implement JTAG support, or use 
    a microcontroller with a i2c memory (there are PIC for less than 10$/€), or 
    Flash memory,...
    
       As the board is intented to try out designs in a modular way, i mean it'll 
    be a core and i/we'll develop some modules to hook up to the board and use it. 
    For example, if someone got Burched board could hook both boards and could have 
    a multiFPGA board, and try to develop a "multi-system" or to begin, there will 
    be a module with and LCD, another with a 7 segment, another with IDE Compact 
    Flash,...(kind like Burched).. that's what i was thinking of.
    
       Taking in considerance that is a TRAINER BOARD, what would you recommend me 
    for your experience to do with memory to program SRAM FPGA ? and what do you 
    think of it being modular and having for that a maximum frec penalty?
    
    
    
    -- 
    Cheers,
     Héctor Orón                              mailto:hecormar@t...
    
    
    

    Follow upAuthor
    Re: [oc] FPGA BOARD ConsiderationsJohn Sheahan

     
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