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    Navigation: All forums > Cores > Message List > Message Post

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    From: "Ho, Wen Jei x4297" <who1@r...>
    Date: Sun, 26 Jan 2003 09:06:45 -0800
    Subject: [oc] Synthesizable Testbench
    Top

    When I worked for IBM 9 years ago, there was a hardware simulator,

    code name "EVE", took net-list only. I had to clone i960/VHDL to

    get net-list to use EVE. The entire testbench was Synthesizable.

     

    There is a book talking about "Synthesizable Testbench":

    Page 20, session 2.2.5, "Principles of Verifiable RTL Design",

    Year 2000 by Lionel Benning and Harry Foster.

     

    Wen

     
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