|
Message
From: Lars Segerlund <lars.segerlund@c...>
Date: Tue, 21 Jan 2003 11:17:18 +0100
Subject: Re: [oc] Real newbie questions
Now, VHDL/Verilog AHPL and so on is actually very good for programing,
the programed design is indispensible for the verification of the
circuit. Also this 'programmed' model can be a good base to start the
hardware abstraction from, since it is easier to do a 'stepwise
refinement' of the choosen design and perhaps some redesing during the
HW description phase.
However, the same problems applies to software in general, everyone
want's to work with the abstractions, but when you want things to rock'n
roll you have to get dirty ;-) ... nothing new under the sun.
Try programming a PCI spec :-) ... and if yo can do that,synthesize it!
/ Lars Segerlund.
Joachim Strömbergson wrote:
> Aloha!
>
> (This turned into "Joachims 0.02 Euro of rambling on HW design"... ;-)
>
> Rudolf Usselmann wrote:
>
>> HDLs in general are a bit different than any "normal"
>> programming language you have used. <snip>
>
>
> Totally agree. I get a serious itch every tine I hear the phrase "(V)HDL
> programming". You don't program using HDL languages, you describe
> hardware. A *huge* difference.
>
> The "HDL programming" thinking seem to be esp pervasive in the FPGA/CPLD
[ ...snip ... ] bla bla bla .. :-)
>
> [2] My favourite term is "code freeze". Used by some to indicate that
> when the design meets the functional requirements (in the simulator),
> the design is finished. All that is left is to synthesise the HDL and
> get HW at the other end. Yeah riiight. ,-)
|
 |
Browse
