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    Navigation: All forums > Cores > Message List > Message Post

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    From: Nestor Lucas <luc@i...>
    Date: Thu, 31 Jan 2002 10:30:17 +0100
    Subject: [oc] HDLC Controller
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    Hi,
    I'm about to evaluate the performance of the HDLC core from your Site. By now I have managed to build a connection between 2 controllers, and verified that the data was well transfered only in certain cases. The "transparency" of the communication is not 100% ensured, since the value of the data bursts framed affected dramatically the value of RxFrameSize. In many cases, the Rx-module detects 1 Byte more than really sent by the Tx-module (N Bytes). The data obtained in RxDataBuffOut is valid during the first N Bytes, but an additional Byte is received, which is difficult to discard automatically (How could we know this extra-Byte was added?).
    I would appreciate inputs regarding this topic, besides further hints for this core.
    Thanks,

    -- 
    ====================================================================
    | Nestor Lucas                        | Fraunhofer IIS-A  LOS      |
    | Phone: +49 (0) 9131 776 6362        | Integrated Circuits Design |
    | Fax  : +49 (0) 9131 776 699         | Am Weichselgarten 3        |
    | E-mail: mailto:luc@i...       | D-91058 Erlangen           |
    | Web: http://www.iis.fhg.de/asic     | Germany                    |
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